Tektronix TLA7P4
136 Channel, 16M, 100MHz, State Logic Analyzer Module
Specs
Product Description:
Tektronix TLA7P4 136 Channel, 16M, 100MHz, State Logic Analyzer Module
Data sheet (PDF)
256K,1M,4M,16Mbits/Ch Also Ava
Channel Grouping
Time Stamp: 50-Bits
Module Merging
Performance Characteristics of the TLA7P4
| Form Factor |
Module (proprietary interface/bus) |
| Number of Channels |
136 ch |
| Maximum Conventional Timing Rate |
250 MHz |
| Maximum Transitional Timing Rate |
250 MHz |
| Maximum Glitch Timing Rate |
100 MHz |
| Memory Depth/Channel-Normal |
16 MB |
| Channel to Channel Delay |
1 ns |
| Minimum Recognizable Glitch Width |
2 ns |
| Maximum State Analysis Rate |
100 MHz |
| Setup/Hold Time |
2 ns |
| Maximum Trigger Sequence Levels |
16 Levels |
| Maximum Trigger Sequencing Rate |
250 MHz |
| No of Pattern Recognizers |
16 QTY |
| No of Range Recognizers |
4 QTY |
| No of Counter Timers |
2 QTY |
| Input Capacitance |
2 pF |
Programmability/Connectivity of the TLA7P4
| User Interface |
Windows/98
|
TLA7P4 Compliance
| CE Compliance |
Compliant
|
| UL Compliance |
Not compliant
|
TLA7P4 Power Requirements
TLA7P4 Physical Dimensions
- Width: (N/A)
- Height: 262 mm(10.31 in)
- Length: 381 mm(14.99 in)
- Weight: 3.1 kg(6.83 lb)
TLA7P4 Standard Accessories
- 1 /Probe Retainer Bracket /Qty:1
- 2 /Probe Manual /Qty:1
- 3 /Installation Manual /Qty:1
- 4 /Certificate of Traceable Calibration /Qty:1